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TFDU5107
Vishay Semiconductors
Low Profile Transceiver Module for Telecom Applications 9.6 kbit/s to 1.152 Mbit/s Data Transmission Rate
Description
The miniaturized TFDU5107 in the well-known Baby Face package is an ideal transceiver for applications in telecommunications like mobile phones, pagers, and PDAs of all kinds. The devices are designed for optimum performance and minimum package size. The device covers the IrDA(R) physical layer specification up to 1.152 Mbit/s (MIR). A current limiter is implemented to operate the device without external resistor in an IrDA compliant mode ( > 1 m). For reduced current as for the `Low Power` mode a current limiting resistor might be added. The device covers the supply voltage from 5.5 V down to 2.4 V and with its low power consumption it is optimum suited for battery-powered applications. Double eye safety protection by pulse duration and current limitation is integrated.
18102
Features
* Package: TFDU5107 Universal (Baby Face) SMD Side and Top View Solderability e3 * Internal IRED current limitation to operate without external resistor. With external resistor adaptable to power reduced operation as IrDA `Low Power` Standard * Wide supply voltage range (2.4 V to 5.5 V) * Operational down to 2.0 V * Logic Input and Output Voltage 1.5 V to 5.5 V set by external control pin * Tri - State - receiver output * Lowest power consumption, typically 500 A in receive mode, <1 A shutdown Fewest external components High EMI immunity Eye safety protection integrated Pin assignment backward compatible to legacy Baby Face package * Split power supply, transmitter and receiver can be operated from two power supplies withrelaxed requirements saving costs, US-Patent No. 6,157476 * Lead (Pb)-free device * Device in accordabce to RoHS 2002/95/EC and WEEE 2002/96/EC * * * *
Applications
* Mobile phones, pagers, hand-held battery Operated equipment * Computers (WinCE, PalmPC, PDAs) * Digital still and video cameras * Extended IR adapters * Medical and industrial data collection
Parts Table
Part TFDU5107-TR3 TFDU5107-TT3 Description Oriented in carrier tape for side view surface mounting Oriented in carrier tape for top view surface mounting 1000 pcs. 1000 pcs Qty / Reel
Document Number 82534 Rev. 1.7, 05-Dec-05
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TFDU5107
Vishay Semiconductors Functional Block Diagram
VCC1
Vlogic Driver
Amplifier
Comparator 200
RXD IRED Anode VCC2
SCLK TXD
AGC Logic
Current controlled driver IRED Cathode
17086
GND
Pin Description
Pin Number 1 Function IRED Anode Description Connect IRED anode directly to a power supply. Adding an external resistor at this pin will make the module to work in "Low Power Mode". IRED Cathode, internally connected to the driver transistor Transmit Data Input Received Data Output, push-pull CMOS driver output capable of driving standard CMOS or TTL loads. No external pull-up or pulldown resistor is required. Pin is floating with a weak pull-up to VCC, when device is in shutdown mode. RXD output is quiet during transmission. Shutdown, will switch the device into shutdown after a delay of 1 ms Supply Voltage Defines the input and output logic swing voltage. Ground I I O HIGH LOW I/O Active
2 3 4
IRED Cathode TXD RXD
5 6 7 8
SD VCC Vlogic GND
I
HIGH
Pinout
TFDU5107 weight 200 mg
BabyFace (Universal)
IRED Detector
18206
12345678
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Document Number 82534 Rev. 1.7, 05-Dec-05
TFDU5107
Vishay Semiconductors Absolute Maximum Ratings
Reference Point Ground, Pin 8, unless otherwise noted Parameter Supply voltage range Test Conditions 0 V < Vdd2 < 6 V 0 V < Vdd1 < 6 V 0 V < Vdd2 < 6 V, 0 V < Vdd1 < 6 V Input current Output sinking current, RXD Rep. pulsed IRED current Average IRED current Power dissipation Junction temperature Ambient temperature range (operating) Storage temperature range Soldering temperature Transmitter data and shutdown input voltage Receiver data output voltage Virtual source size Maximum intensity for class 1 operation of IEC825 or EN60825
1)
Symbol Vdd1 Vdd2 Vlogic
Min - 0.5 - 0.5 - 0.5
Typ.
Max 6 6 6 10 25
Unit V V V mA mA mA mA mW C C C C V V mm
all pins (Pin 1 excluded) Pin 4 Pin 1, ton < 20 %, < 20 s IIRED(RP) IIRED(DC) Ptot TJ Tamb Tstg see chapter Recommended Solder Profile 2.4 V < Vdd1 < 5.5 V VTXD, VSD VRXD Method: (1 - 1/e) encircled energy IEC60825-1 or EN60825-1, edition Jan. 2001 d - 0.5 - 0.5 2.5 2.8 - 25 - 25
500 125 450 125 + 85 + 85 260 6 Vlogic + 0.5
3201)
mW/sr
Due to the protocol real IRDA(R)data transfers in SIR and MIR mode have an equal distribution of `0` and `1` data, therefore the limit is typically a factor of 2 larger than the value for lab testing. The device is protected against TXD short (single fault condition) by an internal shut-off when the pulse duration is exceeding maximum IrDA specification value of pulse duration.
Document Number 82534 Rev. 1.7, 05-Dec-05
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TFDU5107
Vishay Semiconductors Electrical Characteristics Transceiver
Tamb = 25 C, Vdd1 = 2.4 V to 5.5 V unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameter Supported data rates, RXD pulse duration 400 ns Supply voltage range Supply current receive mode Supply current shutdown mode Average supply current , standard MIR transmit mode Ie > 100 mW/sr
1)
Test Conditions base band, SIR mode base band, 1.152 Mbit/s specified operation Vdd1 = 2.4 V to 5.5 V Vdd1 = 2.4 V to 5.5 V Vdd1 = 2.4 V to 5.5 V, above Vdd1 = 3.3 V a serial resistor for reducing the internal power dissipation should be implemented, e.g. RL = 2.7
Symbol
Min 9.6 9.6
Typ.
Max 115.2 1152 5.5
Unit kbit/s kbit/s V A A mA
Vdd1 IS ISSD IS
2.4 500 0.1 60
900 1 110
Shutdown/ mode clock pulse duration Shutdown delay `Receive off` Shutdown delay `Receive on` Transceiver `Power on` settling time
1)
tprog tprog tprog Time from switching on Vdd1 to established specified operation
0.2 1 40
20 1.5 100 50
s ms s s
Maximum data is for 20 % (25 %) duty cycle for SIR (MIR 1.152 Mbit/s) Low power mode. The typical value is given for the case of normal operation with statistical and equal `0` and `1` - distribution.
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Document Number 82534 Rev. 1.7, 05-Dec-05
TFDU5107
Vishay Semiconductors Optoelectronic Characteristics Receiver
Vdd1 = 2.4 V to 5.5 V unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameter Minimum detection threshold irradiance SIR 9.6 kbit/s to 115.2 kbit/s 1) Minimum detection threshold irradiance 9.6 kbit/s to 115.2 kbit/s 1) Maximum detection threshold irradiance Logic low receiver input irradiance Output voltage RXD active, C = 15 pF, R = 2.2 k non active, C = 15 pF, R = 2.2 k Output current RXD Rise time at load Fall time at load RXD signal electrical output pulse width Latency
1)
Test Conditions | | 15 , Vdd1 = 2.4 V to 5.5 V | | 15 , Vdd1 = 2.4 V to 5.5 V | | 90 , Vdd1 = 5 V | | 90 , Vdd1 = 3 V
Symbol Ee, min
Min
Typ. 20
Max 35
Unit mW/m2
Ee, min
50
80
mW/m2
Ee, max Ee, max Ee, max,low VOL VOH
3300 8000 4
5000 15000
W/m2 W/m2 mW/m2
0.5 Vlogic - 0.5
0.8
V V
VOL < 0.8 V C = 15 pF, R = 2.2 k, 1.5 V Vlogic 5.5 V C = 15 pF, R = 2.2 k, 1.5 V Vlogic 5.5 V 1.5 V Vlogic 5.5 V tr tf tp tL 20 20 300 400 100
4 70 70 500 200
mA ns ns ns s
RXD output pulse duration 400 ns
Document Number 82534 Rev. 1.7, 05-Dec-05
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TFDU5107
Vishay Semiconductors Transmitter
Vdd1 = 2.4 V to 5.5 V unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameter Logic CMOS high/low decision threshold Logic low transmitter input voltage Logic high transmitter input voltage Forward current limitation Output radiant intensity, standard MIR level Maximum output pulse width (eye safety protection) Optical pulse width Optical rise/fall time Peak wavelength of emission Spectral optical radiation bandwidth Output radiant intensity Overshoot, optical Rising edge peak to peak jitter
1)
Test Conditions
Symbol VIL(TXD) VIL(TXD)
Min
Typ. 1/2 x Vlogic
Max
Unit V
0 0.81) Vlogic 400 110 250
0.21) Vlogic Vlogic + 0.5
V V mA
1.5 < Vlogic < 5.5 V Vdd1 = 3.3 V | | 15 , IF6 = 400 mA resistor limited PWI > 23 s PWI = 1.6 s PWI = 217 ns
VIH(TXD) IF Ie
320
mW/sr
PWOmin PWO PWO t r , tf p
23 1.45 210 880 45
80 1.75 226 40 900
s s ns ns nm nm
TXD logic low level tj
0.04 25 0.2
W/sr % s
Switch, current can be defined by external resistor, internal current limitation to 500 mA peak
Identification
The TFDU5107 has a hidden identification option. A device identification can be recalled by setting the SD active followed by activating TXD for a short period. With the low going edge of TXD a single pulse is generated at RXD. The SD is intended to activate the shutdown function after a delay of 1 ms. Therefore the full sequence should be run with that 1 ms time limitation, see drawing.
t SD : > 5 s for "real" shutdown > 1 ms t TXD > 5 s to 2 s
SD
TXD
t delTXD 1 s t delRXD 10 ns
t RXD = 400 ns
18207
RXD
Figure 1. Timing Diagram
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Document Number 82534 Rev. 1.7, 05-Dec-05
TFDU5107
Vishay Semiconductors Truth table
Inputs SD TXD Optical input Irradiance mW/m2 high < 1 ms pulse x low going TXD triggers monostable to edit 400 ns low pulse floating (500 k to Vdd) high high high low, pulse of 400 ns edge triggered RXD Outputs LED drive current resulting intensity Ie in mW/sr 0
high > 1 ms low
x high high 80 s low low
x x x <4 > 40
0 10 < Ie < 300 defined by an external resistor 0 0 0
Document Number 82534 Rev. 1.7, 05-Dec-05
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TFDU5107
Vishay Semiconductors Recommended Solder Profile
Solder Profile for Sn/Pb soldering
260 240 220 200 180 160 140 120 100 80 60 40 20 0 0 50 100 150 200 250 300 350 19431_1
240 C max.
10 s max. at 230 C
2...4 C/s 160 C max. 120 s...180 s 2...4 C/s
90 s max.
Time/s
Lead-Free, Recommended Solder Profile The lead-frame based transceivers (all types with the name TFDUxxxx) are lead (Pb)-free and qualified for lead (Pb)-free and lead - bearing processing. In case of using a lead-bearing process we recommend a solder profile as shown in figure 4. For lead (Pb)-free solder paste like Sn-(3.0-4.0)Ag(0.5-0.9)Cu, there are two standard reflow profiles: Ramp-Soak-Spike (RSS) and Ramp-To-Spike (RTS). The Ramp-Soak-Spike profile was developed primarily for reflow ovens heated by infrared radiation. With widespread use of forced convection reflow ovens the Ramp-To-Spike profile is used increasingly. Shown below in figure 5 and figure 6 are VISHAY's recommende profiles for use with the TFDUxxxx transceivers for lead (Pb)-free processing.
Temperature/C
Figure 2. Recommended Solder Profile for Sn/Pb soldering
280 260 240 220 200 180 T 217 C for 50 s max T 255 C for 20 s max T peak = 260 C max.
Temperature/C
160 140 120 100 80 60 40 20 0 0
19261
20 s
90 s...120 s
50 s max.
2 C...4 C/s
2 C...4 C/s
50
100
150 Time/s
200
250
300
350
Figure 3. Solder Profile, RSS Recommendation
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Document Number 82534 Rev. 1.7, 05-Dec-05
TFDU5107
Vishay Semiconductors
280 260 240 220 200
Tpeak = 260 C max
Temperature/C
180 160 140 120 100 80 60 40 20 0 0 50 100 150
<4 C/s 1.3 C/s Time above 217 C t 70 s Time above 250 C t 40 s Peak temperature Tpeak = 260 C
<2 C/s
200
250
300
Time/s
Figure 4. Solder Profile, RTS Recommendation
A ramp-up rate less than 0.9C/s is not recommended. Ramp-up rates faster than 1.3C/s could damage an optical part because the thermal conductivity is less than compared to a standard IC.
Current Derating Diagram
Figure 4 shows the maximum operating temperature when the device is operated without external current limiting resistor. A power dissipating resistor of 2 is recommended from the cathode of the IRED to Ground for supply voltages above 4 V. In that case the device can be operated up to 85 C, too.
600 Peak Operating Current (mA) 500 400 300 200 100 0 -40 -20 0
14875 Current derating as a function of the maximum forward current of IRED. Maximum duty cycle: 25 %.
20 40 60 80 100 120 140 Temperature (C)
Figure 5. Current Derating Diagram
Document Number 82534 Rev. 1.7, 05-Dec-05
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TFDU5107
Vishay Semiconductors Typical Characteristics (Tamb = 25 C unless otherwise specified)
500 5.25 V 400 Intensity (mW/sr) 5.0 V 300 200 100 0 0
15186
max. intensity in emission cone 15
min. Rdson, min. VF
5.0 V max.Rdson, max.VF Vcc=4.75 V min. intensity in emission cone 2 4 6 8 10 12 Current Control Resistor ( 15 14 ) 16
Figure 6. Intensity Ie vs. Current Control Resistor R2, 5 V Applications
700 600 Intensity (mW/sr) 500 400 3.3 V 300 200 100 Vcc = 3.0 V 0 0
15187
max. intensity in emission cone 15 min. Rdson, min. VF 3.6 V min. intensity in emission cone 15
max. Rdson, max. VF 3.3 V
2
4 6 8 10 Current Control Resistor ( )
12
Figure 7. Intensity Ie vs. Current Control Resistor R1, 3 V Applications
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Document Number 82534 Rev. 1.7, 05-Dec-05
TFDU5107
Vishay Semiconductors Package Dimensions
7x1=7 0.6
2.5 1 1 8
18470
Figure 8. Package drawing and solder footprint TFDU5107, dimensions in mm, tolerance 0.2 mm if not otherwise mentioned
Document Number 82534 Rev. 1.7, 05-Dec-05
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TFDU5107
Vishay Semiconductors Appendix Application Hints
The TFDU5107 does not need any external components when operated with a "clean" power supply. In a more noisy ambient it is recommended to add a combination of a resistor and capacitor (R1, C1, C2) for noise suppression as shown in the figure below. A combination of a electrolytic for the low frequency range and a ceramic capacitor for suppressing the high frequency disturbance will be most effective. The capacitor C3 is only necessary when inductive wiring is used or the power supply cannot deliver the operating peak pulse current. The inputs TXD and SD are high impedance CMOS inputs. Therefore, the lines from the I/O to those inputs should be carefully designed not to pick up ambient noise. If long lines are used, loads at the TXD input of the TFDx5x07 and at the RXD input of the controller (!) are recommended. At the IRED Anode voltage supply line an additional capacitor might be necessary when inductive wiring is used. However, a low impedance layout is the better and more cost efficient solution. For adjusting the intensity depending on the application, see the diagrams.
Recommended Circuit Diagram
C1, (C3): 4.7 F, see text C2: 470 nF R1 VCC1 GND RXD VCC2 TXD SD Vlog C3 R2 4 1 3 5 7 RXD Vdd2, IRED Anode TXD SD Vlogic
18208
C2
C1 6 8 Vdd1 GND
Shut down
To shut down the TFDx5x07 into a standby mode the SD pin has to be set active. After a delay of < 1 ms it will switch to the standby mode.
Latency
The receiver is in specified conditions after the defined latency. In a UART related application after that time (typically 50 s) the receiver buffer of the UART must be cleared. Therefore the transceiver has to wait at least the specified latency after receiving the last bit before starting the transmission to be sure that the corresponding receiver is in a defined state.
Recommended Application Circuit Components
Component C1, C3 C2 R1 R2 Recommended Value 4.7 F, 16 V 0.1 F, Ceramic 47 , 0.125 W 5 V supply voltage: 14 0.25 W (recommended using two 6.8 , 0.125 W resistors in series) 3.3 V supply voltage: 4.5 0.25 W (recommended using two 2.3 , 0.125 W resistors in series) Vishay Part Number 293D 475X9 016B VJ 1206 Y 104 J XXMT CRCW-1206-47R0-F-RT1 CRCW-1206-6R80-F-RT2 CRCW-1206-2R26-F-RT1
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Document Number 82534 Rev. 1.7, 05-Dec-05
TFDU5107
Vishay Semiconductors Reel Dimensions
14017
Tape Width mm 24
A max. mm 330
N mm 60
W1 min. mm 24.4
W2 max. mm 30.4
W3 min. mm 23.9
W3 max. mm 27.4
Document Number 82534 Rev. 1.7, 05-Dec-05
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TFDU5107
Vishay Semiconductors Tape Dimensions
19824
Drawing-No.: 9.700-5251.01-4 Issue: 3; 02.09.05 Figure 9. Tape drawing, TFDU5107 for top view mounting, tolerance 0.1 mm
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Document Number 82534 Rev. 1.7, 05-Dec-05
TFDU5107
Vishay Semiconductors
19875
Drawing-No.: 9.700-5297.01-4 Issue: 1; 08.04.05 Figure 10. Tape drawing, TFDU5107 for side view mounting, tolerance 0.1 mm
Document Number 82534 Rev. 1.7, 05-Dec-05
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TFDU5107
Vishay Semiconductors Ozone Depleting Substances Policy Statement
It is the policy of Vishay Semiconductor GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances (ODSs). The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. Vishay Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency (EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively. Vishay Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances.
We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use Vishay Semiconductors products for any unintended or unauthorized application, the buyer shall indemnify Vishay Semiconductors against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. Vishay Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany
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Document Number 82534 Rev. 1.7, 05-Dec-05
Legal Disclaimer Notice
Vishay
Notice
Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc., or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies. Information contained herein is intended to provide a product description only. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. Customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Vishay for any damages resulting from such improper use or sale.
Document Number: 91000 Revision: 08-Apr-05
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